1. Field of the Invention
The present invention relates to a substrate for a liquid crystal display, and more particularly, to a substrate for a liquid crystal display in which metal lines including a gate line and a data line are formed to be suitable for realizing a high resolution in a large-sized screen.
2. Discussion of the Background Art
Generally, a liquid crystal display (LCD) includes a TFT (thin film transistor) array substrate on which thin film transistors (TFTs) and pixel electrodes are arranged and a color filter substrate facing the TFT array substrate on which color filters and a common electrode are formed, and a liquid crystal injected into a space between the TFT array substrate and the color filter substrate. These LCDs display images by using an optical switching property of the liquid crystal interposed between the two substrates. In recent times, LCDs are increasing in popularity as a next generation display device to replace the cathode ray tube (CRT) because of their light weight and slim characteristics.
FIG. 1 is a plan view schematically showing a configuration of metal lines formed on a substrate for an LCD.
As shown in FIG. 1, a plurality of metal lines are formed on a substrate for an LCD. For instance, the metal lines include a plurality of gate lines 110a to 110n (110) formed in a length direction and a plurality of data lines 120a to 120n (120) formed in a width direction and perpendicularly crossed with the gate lines. A plurality of gate line pads 111a to 111n (111) into which gate driving signals for respective pixels are inputted, are formed at one end of the gate lines 110. A plurality of data line pads 121a to 121n (121) into which data driving signals for respective pixels are inputted are formed at one end of the data lines 120.
Here, unit pixel 130 is defined as a region in which a pair of gate lines are crossed with a pair of data lines.
In detail, the data lines 110 and the gate lines 120 are made of a conductive material and applies a driving current to the TFT element corresponding to the pixel 130. The data lines 110 and the gate lines 120 are formed by a method including the steps of depositing a metal film and a photoresist film on a substrate on which TFTs are arranged, and selectively removing the photoresist film and the metal film through a photolithography process.
As time progresses, the metal line including these gate lines and data lines is becoming increasingly lengthened according to a trend of increasing the size of LCDs.
FIG. 2 is a perspective view of a metal line to depict the resistance characteristic of the metal line.
When the length of the metal line is l, the sectional area is A, and the conductivity is 6, a total resistance of the metal line R equals to l/6A. Accordingly, if the flowing current is I, a voltage drop ΔV in the metal line is expressed by the following equation: ΔV=iR=il/6A. This relation means that when the sectional area A (including elements of the thickness and the line width) of the gate line 110 and the data line 120 is constant, the voltage drop ΔV depends on the respective lengths of the gate line 110 and the data line 120.
As a result, although an equal driving voltage is applied to the gate line pad 111a and the data line pad 121afrom the drive IC (not shown) of the LCD, the voltages applied to the gate line 110 or the data line 120 varies at a specific location depending on the resistance. For example, according to the lengths of the gate lines 110 and the data lines 120, a lower voltage is applied to a pixel (Pn of FIG. 1) further away from the pads 111a, 121a than a pixel (Pa of FIG. 1) placed nearer to the pads 111a, 121a. Accordingly, the pixel (Pn of FIG. 1) needs a longer charging time than the pixel (Pa of FIG. 1) when the pixels (Pn and Pa) are charged up to a specific electric charge. In other words, if the resistance increases, the current flowing through under the same voltage decreases, so that the charging time is lengthened.
The extended charging time causes a signal delay phenomenon in which the frequency for driving the LCD panel is lowered.
In order to solve this problem, it is necessary to decrease an overall resistance of the metal line by decreasing the length of the metal line, or increasing the sectional area of the metal line.
However, upon considering the trend in increasing a size of the LCDs, it is substantially difficult to shorten the length of the metal line.
A background art method for increasing the sectional area of the metal line, includes increasing the line width or increasing the thickness of the metal line.
However, if the line width of the metal line increases and the thickness decreases, little improvement in the height difference corresponding to the decrease in the thickness is obtained, but the lowering in the aperture ratio of the pixel due to the increase in the line width results. The lowering phenomenon in the aperture ratio is described with reference to FIG. 3.
FIG. 3a and FIG. 3b are sectional views of substrates for LCDs illustrating the variation in the aperture ratio depending on the increase in the line width of the metal line. Specifically, FIG. 3a shows a status prior to increasing the line width of the metal line, and FIG. 3b shows a status after the line width of the metal line increases.
The metal line for the gate line and the data line are generally made of an opaque metal. To this end, the increase in the line width allows the light transmission area of a substrate 320 to be decreased from L1 to L2. The decrease in the light transmission area causes more of the light irradiated from a backlight to be lost while light is transmitted from the substrate resulting in the aperture ratio of the pixel being lowered.
The occurrence of the aforementioned phenomenon is not restricted only to the transmission type LCD substrate but is applied to the reflection type LCD substrate likewise.
Of course, the problem of lowering in the aperture ratio can be resolved by increasing the thickness of the metal line instead of increasing the line width of the metal line.
FIG. 4 is a schematic view for illustrating that a crack is generated in the inorganic insulating film formed on the metal line.
As shown in FIG. 4, when the thickness of the metal line is increased, a serious height difference is generated between the metal line portion and the non-metal line portion. So, if the inorganic insulating film 330 is further deposited on the metal line 120, a problem occurs in that a crack is generated in the inorganic insulating film 330, so that many defective devices are mass-produced. Hence, the thickness of the metal line cannot be increased above a certain limit.
Because of the above problems, the background art method for forming the metal line has prevented process failures by decreasing the aperture ratio of the pixel so as to solve the signal delay problem.
However, in the manufacturing process of a large-sized, high brightness and high resolution LCD sought after at the present time, there is a problem in applying the aforementioned methods due to a limitation on the application. Especially, in order to realize a large-sized LCD, it is essentially required to decrease the resistance of the metal line.